Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part II: CNT Interconnect Optimization

economic optimization and energy consumption in tray dryers

دراین پروژه به بررسی مدل سازی خشک کردن مواد غذایی با استفاده از هوای خشک در خشک کن آزمایشگاهی نوع سینی دار پرداخته شده است. برای آنالیز انتقال رطوبت در طی خشک شدن به طریق جابجایی، یک مدل لایه نازک برای انتقال رطوبت، مبتنی بر معادله نفوذ فیک در نظر گفته شده است که شامل انتقال همزمان جرم و انرژی بین فاز جامد و گاز می باشد. پروفایل دما و رطوبت برای سه نوع ماده غذایی شامل سیب زمینی، سیب و موز در طی...

Multilevel Interconnect Technology for 45-nm Node CMOS LSIs

We have developed a novel porous low-k material called nano-clustering silica (NCS) which has a low dielectric constant (k = 2.25) and high mechanical strength (Young’s modulus E = 10 GPa), and established manufacturing technology for 45-nm node multilevel Cu/Full-NCS interconnects which use NCS in trench layers and via layers to reduce the resistance-capacitance (RC) delay. Our Cu/Full-NCS int...

Interconnect Design Using Convex Optimization

Two wire sizing formulations for optimizing interconnect are presented. The rst minimizes the delay under wire width constraints, while the second minimizes the wiring area under delay and width constraints. A convex programming formulation is proposed, and an e cient algorithm is used to perform the optimization. Experimental results show that the rst formulation, which has been the prevalent ...

Novel 8-Phase VCO Design using Carbon Nanotube Transistor (CNT)

This paper proposes a novel 8-phase VCO design implemented using Carbon Nanotube Field-Effect Transistors (CNTFETs). Carbon Nanotube is a fast growing and promising technology to replace Traditional MOSFETs. Its operation principles and device structure are similar to the conventional bulk CMOS, however it shows a great power delay improvement over bulk MOSFET due to its near-ballistic CNT tran...

Optimization of carbon nanotube ultracapacitor for cell design